FinFET is a novel double-gate device structure for future device design, modeling and circuit simulation purposes. FinFET have high-performance and low leakage, fully depleted silicon-on-insulator (FDSOI) device, which have been demonstrated down to 15 nm gate length and are relatively simple to fabricate, which can be scaled to gate length below 10 nm. In this paper the modeling of potential and current is carried out. Further the theoretical aspects of the series resistance, reliability issues, process variation effects and device scaling limits are also described for this device.

Key words : MOSFET, FinFET, Device Modeling, reliability issues