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TITLE : IMPLEMENTATION OF FLOATING POINT AND LOGARITHMIC NUMBER SYSTEM ARITHMETIC UNIT AND THEIR COMPARISON FOR FPGA  
AUTHORS : Amit Kumar      Saxena .A.K      Dasgupta .S       
DOI : http://dx.doi.org/10.18000/ijies.30016  
ABSTRACT :

Floating point (FP) representation is commonly used to represent real numbers. Some papers have suggested the use of logarithmic number system (LNS) in addition to floating point. In LNS, a real number is represented as a fixed point logarithm. Therefore multiplication and division in LNS are much simpler in comparison to that in FP, so the LNS can be beneficial if addition and subtraction can be performed with speed and accuracy equal to FP. LNS addition and subtraction requires interpolation technique for which some vales are stored in read only memory (ROM). In this paper, different sizes ofROMare used for addition and subtraction and their performances are compared to the floating point.

Keywords : FPGA, Logarithmic Number Systems, ROM.

 
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